golden hour

/usr/include/asm

⬆️ Go Up

Upload

File/Folder	Size	Actions
a.out.h	693 B	Del OK
auxvec.h	483 B	Del OK
bitsperlong.h	229 B	Del OK
boot.h	260 B	Del OK
bootparam.h	4.39 KB	Del OK
byteorder.h	137 B	Del OK
debugreg.h	3.15 KB	Del OK
e820.h	2.63 KB	Del OK
errno.h	31 B	Del OK
fcntl.h	31 B	Del OK
hw_breakpoint.h	6 B	Del OK
hyperv.h	13.32 KB	Del OK
ioctl.h	31 B	Del OK
ioctls.h	32 B	Del OK
ipcbuf.h	32 B	Del OK
ist.h	790 B	Del OK
kvm.h	6.76 KB	Del OK
kvm_para.h	2.77 KB	Del OK
kvm_perf.h	325 B	Del OK
ldt.h	963 B	Del OK
mce.h	1.18 KB	Del OK
mman.h	1.01 KB	Del OK
msgbuf.h	32 B	Del OK
msr-index.h	28.24 KB	Del OK
msr.h	283 B	Del OK
mtrr.h	4.06 KB	Del OK
param.h	31 B	Del OK
perf_regs.h	654 B	Del OK
poll.h	30 B	Del OK
posix_types.h	161 B	Del OK
posix_types_32.h	702 B	Del OK
posix_types_64.h	546 B	Del OK
posix_types_x32.h	518 B	Del OK
prctl.h	345 B	Del OK
processor-flags.h	6.1 KB	Del OK
ptrace-abi.h	1.76 KB	Del OK
ptrace.h	1.17 KB	Del OK
resource.h	34 B	Del OK
sembuf.h	699 B	Del OK
setup.h	6 B	Del OK
shmbuf.h	32 B	Del OK
sigcontext.h	5.11 KB	Del OK
sigcontext32.h	1.64 KB	Del OK
siginfo.h	431 B	Del OK
signal.h	2.77 KB	Del OK
socket.h	32 B	Del OK
sockios.h	33 B	Del OK
stat.h	2.89 KB	Del OK
statfs.h	353 B	Del OK
svm.h	5.09 KB	Del OK
swab.h	661 B	Del OK
termbits.h	34 B	Del OK
termios.h	33 B	Del OK
types.h	113 B	Del OK
ucontext.h	339 B	Del OK
unistd.h	296 B	Del OK
unistd_32.h	9.4 KB	Del OK
unistd_64.h	8.62 KB	Del OK
unistd_x32.h	14.98 KB	Del OK
vm86.h	2.98 KB	Del OK
vmx.h	6.53 KB	Del OK
vsyscall.h	375 B	Del OK

Edit: debugreg.h

#ifndef _ASM_X86_DEBUGREG_H #define _ASM_X86_DEBUGREG_H /* Indicate the register numbers for a number of the specific debug registers. Registers 0-3 contain the addresses we wish to trap on */ #define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */ #define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */ #define DR_STATUS 6 /* u_debugreg[DR_STATUS] */ #define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */ /* Define a few things for the status register. We can use this to determine which debugging register was responsible for the trap. The other bits are either reserved or not of interest to us. */ /* Define reserved bits in DR6 which are always set to 1 */ #define DR6_RESERVED (0xFFFF0FF0) #define DR_TRAP0 (0x1) /* db0 */ #define DR_TRAP1 (0x2) /* db1 */ #define DR_TRAP2 (0x4) /* db2 */ #define DR_TRAP3 (0x8) /* db3 */ #define DR_TRAP_BITS (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3) #define DR_STEP (0x4000) /* single-step */ #define DR_SWITCH (0x8000) /* task switch */ /* Now define a bunch of things for manipulating the control register. The top two bytes of the control register consist of 4 fields of 4 bits - each field corresponds to one of the four debug registers, and indicates what types of access we trap on, and how large the data field is that we are looking at */ #define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */ #define DR_CONTROL_SIZE 4 /* 4 control bits per register */ #define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */ #define DR_RW_WRITE (0x1) #define DR_RW_READ (0x3) #define DR_LEN_1 (0x0) /* Settings for data length to trap on */ #define DR_LEN_2 (0x4) #define DR_LEN_4 (0xC) #define DR_LEN_8 (0x8) /* The low byte to the control register determine which registers are enabled. There are 4 fields of two bits. One bit is "local", meaning that the processor will reset the bit after a task switch and the other is global meaning that we have to explicitly reset the bit. With linux, you can use either one, since we explicitly zero the register when we enter kernel mode. */ #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */ #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */ #define DR_LOCAL_ENABLE (0x1) /* Local enable for reg 0 */ #define DR_GLOBAL_ENABLE (0x2) /* Global enable for reg 0 */ #define DR_ENABLE_SIZE 2 /* 2 enable bits per register */ #define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */ #define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */ /* The second byte to the control register has a few special things. We can slow the instruction pipeline for instructions coming via the gdt or the ldt if we want to. I am not sure why this is an advantage */ #ifdef __i386__ #define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */ #else #define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */ #endif #define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */ #define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */ /* * HW breakpoint additions */ #endif /* _ASM_X86_DEBUGREG_H */
Save